820-3208 No SSD

hascanio

New member
Hi, no internal SSD recognized.
Things done :
- Changed U4510
- All capacitors from C4510 to C4520 have correct values
- Connector J4501 changed (there was a short with pin 7)
- PP3V3_S0 present on Pin 1, 2, 24, 25, 26
- 3.4V on pin 20 (SSD_reset_L)

Thanks
 
Last edited:

2informaticos

Administrator
Staff member
Any history available?

Boot USB macOS and check if is detected in Disk Utility.
Be sure is not APFS issue...
 

hascanio

New member
I already boot from USB but it not detect any internal disk. I tried boot also EL Capitan to avoid APFS problems.
 

2informaticos

Administrator
Staff member
If original SSD is APFS formatted, will not be detected in boot menu.
However, it must appear in Disk Utility of USB macOS.

Check SSD_CLKREQ_L signal.
 

hascanio

New member
Hi, i check signal with oscilloscope (and compare with other functional board) and is good. Voltage is 3.3V.
 

2informaticos

Administrator
Staff member
"Voltage is 3.3V."
Doesn't look good for me.
It is a DC signal (no need o-scope) and must be pulled down when SSD is inserted.
Check SSD connector and try another SSD.
 

hascanio

New member
I check continuity with the up part of the SSD and it works, so the pin is touching the disk but the voltage doesn't change when it is inserted, 3.3V. The SSD is good because i tried on other machine and ther conector is new. I also check impedance of every pin and compared with a working machine : every value is is correct.
 

2informaticos

Administrator
Staff member
So SSD_CLKREQ_L stays high in other working board?
That means Apple screwed again with signal names.
AP_CLKREQ_L is tied to ground when airport card is inserted, for example...
 

hascanio

New member
So SSD_CLKREQ_L stays high in other working board?
That means Apple screwed again with signal names.
AP_CLKREQ_L is tied to ground when airport card is inserted, for example...
I knew that if the value is LOW (of every signal with xxxxxxx_L) is not working, as the SMC_RESET_L.
 

2informaticos

Administrator
Staff member
"if the value is LOW (of every signal with xxxxxxx_L) is not working"
Not true, depends from case to case.
The end L means active low signal.
SMC_RESET_L must be high just to disable it; nothing work in reset mode.
AP_CLKREQ_L when low (active), requests clock signal from PCH; and that is normal value, when airport works.
I was expected to have the same behaviour for SSD_CLKREQ_L.

Seems that Apple wants to make things hard.
I already saw they don't respect this on the reset signal for audio codec.

Check traces, resistors and caps around U4510.
Compare diode mode readings on data lines with good board; especially the right side of C4510-18.
 

hascanio

New member
I already check a few days ago with the diode mode (impedance) all the pins and they where correct. Caps C4810-18 where good but i changed them all anyway. Now i see that values on pins 22 and 23 are not correct (1,6 V each) and in the working board are 0 and 3,4V). The come directly from the SMC. I already change it in the past but i change it another time and i'am sure i see for a while 3.4V on pin 23 but now they go back to incorrect values. These signals are generated somewhere or what ? Because they are direcly connected to SMC and go nowhere else....
I also check the values of these pins directly near the SMC and not only on the SSD connector : are the same. Pins are not shorted and impedance is correct for each.
 
Last edited:

2informaticos

Administrator
Staff member
These are data lines, where SMC communicates with SSD.
The DC voltage is not fixed, depends if there is changing data, or not.

If you are sure about SSD itself, connector and traces, there must be PCH problem.
If you already discarded U4510 and series caps.
 
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