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Thanks John
i have a compatible display but it's on my daily driver and I'm in meetings much of the next while. So it may be a fortnight or so before I can spare it more's the pity .
ah. that is interesting. PPBus has always been 8.2v even when the board was in an S0 state. definitely something fishy.
i will reflow the SMC later. I don't have any stencils here to do a proper reball of a donor.
why do you think that PPBUS is incorrect? It is 8.2v.
SMC_RESET_L is high (as per message yesterday).
yes. missing SMC_PM_G2_EN as per the same previous message.
Yes - it's very odd. the voltage stays the same whether the coil is there or not. makes me very suspicious of U7201. but .... there is no enable inputer on U7201 either
also to note that there is no 3v on the middle pin of the magsafe.
U2700 receives pp3v42_g3h. i cannot see any cap that is bad around U2700. there is no short on that rail.
But ... i cannot see the logic that says that the PCH must start up just because U2700 is working. doesn't the PCH...
yes. with L7260 removed there is 2.6+v at both pads (which I find a bit odd and makes me suspicious of U7201)
Interestingly R7260 and61 measure 11k and 7.8k respectievely . on a donor board they measure closer to 20 and 9k
replaced the clock chip again. ppvrtc is at 2.3v now. PP3v3_s5...
i used an RTC from a donor board. but since VRTC is the same as pp3v3_s5 I suspect the issue is not the clock chip but pp3v3_s5.
i will double check the caps.
the more interesting question, forensically, is that the board had fan spin when the resistor to all_sys_pwrgd was remove to...
resistances on the requested lines are
PPVRTC- 4MOhm
PP3v3_S5 - 3.8kOhm
the always-on rails are present (save that PPVRTC is at 2.7v)
SMC_RESET_L,SMS_PWRBTN_L are both high.
SMC_PM_G2_EN is at at a few mV.
dead SMC?
Sure. But if the signal wasn't being generated then all the other rails that rely on it would not be present. And previously the board was in an S0 state meaning that pm_slp_s3_l was not in an active low state .
I don't think it can be PCH as that enable signal is generated from pm_slp_s3_r which is also required for other enable lines that I know are functional.
i guess either r or c7981 must have been damaged.
But of course now the problem is rather wider with no full S5 rails and only 2.7v on...
that would be annoying. but I can't see why the PCH would spontaneously have fried.
I have swapped the clock chip. Output on RTC is still 2.7v . Also pp3v3_s5 is at 2.7v as is the P3V3S5_DRVH line coming from U7201
no enable on U7941. dead SMC?
for example leave R7967 in place; remove the other resistors 7963-8 and test for voltage on pad 1.
unfortunately now a retrograde step in any event. i had identified that CPUVCCIOS0_EN was not present. went to make a cup of tea and have come back to find that the board is no longer in an s0...
thank you
removing R7901, R7903-6 sends pwrgd high. measuring on the incoming side of each removed resistor pad gives the following:
p5vs3_pgood 0.5v
p3v3s5_pgood 0.5v
pvccsa_pgood 0v
cpuvccios0_pggod 0.6v
p1v8s0_pggod 0.6v
CPUIMVPAXG_PGOOD 0v
so i guess a problem on one of the 0v...