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Look at where 5V_S3 is generated. P3V3S5_EN is enable for the 3V S5 rail. You say there is 5V on L7220 so P5VS3_EN_L which comes from Q7911. Q7911 is driven by the same bus as DDRREG_EN through R7911. So if there is 5V on L7220 the enable for DDRREG_EN must be high.