820-01598 No Boot

2informaticos

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Looks normal; compare with good board, just in case.

Check the voltages from pages 69 & 70.
Be sure all is good around U7100.
 
Don't have a good board to test against.

I am getting 0v on CPUCORE_FCCM
CPUCORE_FCCM - GND 123 in diode mode.

Must have measured CPUCORE_PWM1 - 2.5v twice by mistake.

What should FCCM be?

I am measuring around U7100 and will go over pages 69-70
 
Getting the following at U7100
CPUSA_PWM - 4.7v
CPUSA_FCCM - 5.05v

Is this below the threshold for triggering U7270?

Getting my head round the order, am I right in think the below?

U7100 provides CPUSA_PWM CPUSA_FCCM which turn on U7270 which then provides PPVCCSA_S0_CPU
This comes on before the other CPU voltages?
 
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2informaticos

Administrator
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Is not so simple; BIOS is involved there, as communication between PCH and CPU too.

Power pins are 41 & 42.
 
U7100

Pin Voltages - Let me know if labels make things easier and I will add them. (Positive to Ground)

1 0
2 0
3 1.4
4 2.05
5 0
6 0
7 0
8 0
9 0
10 0
11 0
12 2.49
13 2.49
14 0
15 1.55
16 2.05
17 0
18 0
19 0
20 0
21 0
22 0
23 5.07
24 0
25 2.47
26 2.46
27 2.28
28 0
29 4.57
30 0.09
31 0
32 0.09
33 0.09
34 5.05
35 4.79
36 0
37 0
38 0
39 0
40 0
41 12.52
42 5.07
43 1.03
44 0.1
45 0
46 0
47 1.62
48 1.78
 

2informaticos

Administrator
Staff member
The chip is correctly powered up and enabled.
But is controlled through VIDx and PROGx lines as well.
A problem with T2, or PCH can block it...
 
Page 69 Values - These all look fine to me.

PP3V3_G3H_RTC 3.29
PPVBAT_G3H_CONN 12.56 <-> 0.18 Fluctuates between the two (No battery connected)
PMU_ONOFF_L 1.79
PMU_RSLOC_RST_L 3.25
CHGR_RST_IN 0
CHGR_COMP 1.56
UPC_PMU_RESET 0
PPVIN_G3H_P3V3G3HRTC 12.56
CHGR_EN_MVR 5.02
PP3V3_G3H_RTC_REG_R 3.28
P3V3G3HRTC_RA_R 3.29

Ok so I know T2 is U3900, I will get probing.

What is the PCH, had thought it was be integrated into the CPU.
 
The T2 is involved with everything.. Great!

By the looks of it the T2 Chip/U3900 must be powered on for me to have got it into DFU mode but any of the other chips it interfaces with could then kill it and prevent a boot.
 
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2informaticos

Administrator
Staff member
I was expected an output voltage, like L7702 and other coils associated to U7800.

PCH is included in the same CPU chip, but we still refer to its blocks as usual.
 
PPVDDCPU_AWAKE 0.79v coming out of U3900 into U7800

Then nothing on big coils.

U7710 is responsible for L7702 (I believe) Conclusive but maybe not that relevant.

Pin - v
1 - 0
2 - 0
3 - 0
4 - 0
5 - 0
6 - 0
7 - 0
8 - 0
9 - 0
10 - 0
11 - 0
12 - 4.71
13 - 5.09
14 - 0
15 - 0
16 - 0
 
All voltages on Page 78 concerning U7800 look good.

And it looks as if U7710 is turned on by CPU_VCCEOPIOSENSE_P and CPU_VCCEOPIOSENSE_N so wouldn't expect anything on L7702.
 
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2informaticos

Administrator
Staff member
Don't make wrong assumptions.
U7710 expects enable signal at pin 3 and is powered at pins 13 & 14, not 12.

PPVDDCPU_AWAKE is generated by U7800 and powers up T2 chip.

Do NOT touch U3900, you cannot replace it; if is bad, board is trash.

Probably something affected by liquid on the board.
Can be T2, or CPU; not too much hope...
 
Thank you, I have made a few wrong assumptions. Pin 13 - 14 on U7710 was a mistake.

I will go over the schematics a little more and work out what I need to measure to check if there is something up with U3900.

Are there any technical docs re the T2 logic? I had better get a better understanding as I will be seeing a lot more T2 MacBooks.

I have not pulled anything off it yet.

Thanks again!
 
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