820-02098 5v 0.05a

[Isolated]

I have a liquid damaged 820-02098 M1. No corrosion around CD3217 areas. Corrosion is located from UR500 to C8012 if that helps. UR500 was the worst and has been removed due to creating a short, waiting on replacement but the board should still work without once fixed, correct?

PPBUS_AON - 12.4v (ISL9240 replaced)
PP3v8_AON - 3.8v
PP5v_S2_MAIN - unstable
PP3v3_s2 - unstable
PP1v8_S2SW - unstable
PP1v8_S2 - unstable
PP1v2_s2 - unstable
PP1v2_AWAKE - unstable
PPVDD_ECPU_SRAM_AWAKE - unstable
PPVDD2H0_S2SW - unstable
PMU_VDDHI - 4.9v


I don't have much experience with the new power sequencing of the M1/2/3 devices but it seems that the S2 rails are generated by U8100/U7700? Is that why the S2 rails are cycling due to bad PMU, is the M1 CPU dead? I have schematics and boardview.

Thank you for any help or tips!

 

[2informaticos]

U8100 and U7700 should generate stable LDOs at least; check that on pages 41 & 37.

 

[Isolated]

Are these the LDOs you are referring to?

U8100
PP1V8_S2SW_CLVR_VDDC1_LDO - unstable
PP3V3_AON - unstable
PP0V8_S2_CLVR_VDDDIG - unstable
PP1V8_AON - 1.8v
PP1V2_AON - 1.2v
PP1V5_AON_VCORE_MPMU - 1.5v

U7700
PP0V72_S2_VDDLOW - unstable
PP1V2_AWAKESW_BLC - 0v
PP1V8_AON_SPMU - 1.8v
PP1V2_AON_SPMU - 1.2v
PP1V5_AON_VCORE_SPMU

Is it possible these PMUs need to be replaced?

Thank you for your time and help so far, I appreciate it!

 

[Isolated]

Are these other rails pulsing due to 5V_MAIN being unstable?

 

[2informaticos]

"PP3v8_AON - 3.8v
--------------------
PP3V3_AON - unstable"
???

 

[Isolated]

Yes, I just used a different test point to confirm, I know it's weird but 3v8 is stable while 3v3 is bouncing all around

 

[Isolated]

I was thinking, could it be some sort of short protection on another secondary rail? What are the odds of dead but pulsing PMUs vs shorted secondary rails tripping protection? Does the PMU generate 3v3_AON? Looks like it does in the schematics but just verifying.

 

[2informaticos]

You should check diode mode to ground on all secondary power rails.
Compare with good board, or reference table.

OpenBoardData Project

 

[Isolated]

I tested every power rail on pages 137-141 and these are what I came across as potentially odd.

PPVDD_SOC_S1 is 0.64 vs openboarddata 0.130 is that cause for concern? Is this M1 CPU fried? Could this still just be faulty U8100/U7700? If 3v8_AON powers U8100 and U8100 outputs 3v3 that would make sense as to why 3v8 is stable while 3v3 is jumping. Any suggestions?

These are the only weird ones I found but they are 'close'
(Dead board vs open board data)
PP3V3_AON - 0.398 vs 0.551 (unstable voltage)

Thank you again for your time, I see you all the time on this forum. You must be very busy!

 

[2informaticos]

If you can access DFU, PMUs LDOs should be stable; check that.

 

[Isolated]

Ill try to get into DFU tomorrow following https://logi.wiki/index.php/DFU_Mode_Restore_(Macs)#NO_DFU_Mode_Troubleshooting

 

[Isolated]

Have not had the chance to try DFU mode yet, but I don't think it will work. This issue seems very similar to https://boards.rossmanngroup.com/th...d-damage-for-data-revovery.65208/#post-110842

Looks like possibly dead M1 CPU Why do I always get the dead CPUs... Going to try DFU as last hope anyway.

 

[Isolated]

Will not enter DFU mode, PP1v2_S2 unstable and pulsing along with other PMU LDOs. Do you think this M1 CPU is dead? Or should I order some PMUs to test?

PP5V_S2_MAIN is unstable too, would that cause PMUs to create unstable LDOs?

 

[2informaticos]

PMUs can detect a probem with a secondary power supply.
That can be a reason for power cycling.

However, entering DFU should break power on sequence, disabling generation of many secondary power supplies.

 

[Isolated]

What do you mean by secondary power supplies? Will they be on the power aliases page or somewhere else? I cannot enter DFU because 1v2_s2 is unstable so if I bridge 1v2_s2 to SOC_FORCE_DFU there isn't any stable voltage to pull it up. Also, I just found that PMU_CRASH_SLAVE_L is pulsing if that helps at all, probably a shot in the dark.

 

[2informaticos]

Thinking more, PMUs LDOs are not simple secondary power rails.
If PPBUS_AON and 3V8_AON are stable, these must be stable too.
If not, there may be problems with PMUs, or CPU.

 

[Isolated]

yes, PPBUS_AON and 3v8_AON are stable at 12.4v and 3.8v. Is there a way I can test for a faulty M1 CPU? I’m happy to buy new U8100 and U7700 but not if the cpu is dead obviously. Seriously, thanks again for your time and help, i really appreciate it.