Hello,
this 820-3032 is dead. I noticet that the cpu is getting slightly warm after some time (i guess thats because PPVCCSA_S0_CPU, PP1V05_S0 and PP1V8_S0_CPU_VCCPLL_R are there but VCORE_S0_CPU, VCORE_S0_AXG and PP1V5_S3RS0 are missing). I checked powerrails and came to a point where i got stuck. PP1V5_S3 is the first rail thats missing. So i followed it and as far as i understand it that is how it works:
PP1V5_S3 (missing) is created by U7300. It needs DDRVTT_EN as enable (that is missing too). DDRVTT_EN = MEMVTT_EN and MEMVTT_EN needs PLT_RESET_L to be present at Q2810. PLT_RESET_L is also missing.
Here it confuses me. As far as i know VCORE comes up first and PLT_RESET_L after that as the CPU creates it. VCORE is missing on this board and ALL_SYS_PGOOD enables VCORE. But ALL_SYS_PGOOD needs PP1V5_S3 (the missing rail from the beginning) and i am back where i startet.
So there is some point where i didn?t understand the power on sequence correctly...
this 820-3032 is dead. I noticet that the cpu is getting slightly warm after some time (i guess thats because PPVCCSA_S0_CPU, PP1V05_S0 and PP1V8_S0_CPU_VCCPLL_R are there but VCORE_S0_CPU, VCORE_S0_AXG and PP1V5_S3RS0 are missing). I checked powerrails and came to a point where i got stuck. PP1V5_S3 is the first rail thats missing. So i followed it and as far as i understand it that is how it works:
PP1V5_S3 (missing) is created by U7300. It needs DDRVTT_EN as enable (that is missing too). DDRVTT_EN = MEMVTT_EN and MEMVTT_EN needs PLT_RESET_L to be present at Q2810. PLT_RESET_L is also missing.
Here it confuses me. As far as i know VCORE comes up first and PLT_RESET_L after that as the CPU creates it. VCORE is missing on this board and ALL_SYS_PGOOD enables VCORE. But ALL_SYS_PGOOD needs PP1V5_S3 (the missing rail from the beginning) and i am back where i startet.
So there is some point where i didn?t understand the power on sequence correctly...