A2251 / 820-01949: ALL_SYS_PWRGD pulsing, no CPUVR_PGOOD, no PPVCCIN_S0_CPU

waterchill

Member
Hi everyone,

I have a MacBook Pro A2251, board 820-01949. No liquid damage, no drop damage.

USB-C negotiates 20V. Battery charges normally and is now fully charged. With battery connected, PPBUS_G3H is 12.56V. Without battery, USB-C power draw cycles from under 1W up to about 4W, then drops back to about 1W. Board does not boot.

Main rails present:

  • PPBUS_G3H: 12.56V with full battery
  • PP3V3_G3H: 3.37V
  • PP5V_G3S: 5.14V
  • PP3V3_G3S: 3.39V
  • PP1V8_G3S: 1.8V
  • PP3V3_S5: 3.36V
  • PP1V8_S5: 1.82V
Important signals:

  • ALL_SYS_PWRGD pulses at about 35.7Hz. DMM reads about 1.43V average.
  • PM_RSMRST_L: 3.3V
  • PM_SLP_S3_L_1: 3.3V
  • PP1V05_S0_CPU_VCCST: 1.05V
  • CPU_VCCST_PWRGD: 0.8V
  • 38.4MHz PCH clock is present on XTALIN/XTALOUT
  • PM_THRMTRIP_L: 1.02V
  • CPU_CATERR_L: 1.02V
CPU VR area:

  • PPVIN_S0_CPUVR_VIN: 12.6V
  • PP5V_COREVR_VCC: 5V during the 4W pulse, then drops/wobbles around 2.3–2.4V
  • PP5V_MAIN_VCORE1/2/3: 5.14V
  • CPUVRENA: 3.3V
  • CPUVRENB: 1.0V
  • CPU_VR_EN_R pulses around 0.8V
  • CPUCORE_PWM1/2/3: no real PWM activity
  • CPUCORE_SW1/2/3: 0V
  • PPVCCIN_S0_CPU: 0V
  • CPUVR_PGOOD: 0V
SVID lines:

  • CPU_VIDSCLK / CPUVR_VIDSCLK_R
  • CPU_VIDSOUT / CPUVR_VIDSOUT_R
  • CPU_VIDALERT_L / CPUVR_VIDALERT_L_R
All sit around 0.8V idle, but I see no SVID activity on the scope.

R7105 and R7106 initially measured around 360k instead of 0 ohm, so I fixed those links. No change in behavior.

I removed U7100 for testing. With one SVID 0-ohm link lifted, the CPU side still measures around 0.22V in diode mode, while the U7100 side is OL/no measurable diode path. So the odd SVID diode reading seems to come from the CPU/U0500 side, not the U7100 pad side.

Question: Would you suspect U7100 / ISL95828B3 first, or does this point more toward U0500 / CPU SVID domain? Are there any other lines on this board that can block SVID/CPU VR startup even though PM_RSMRST_L, PM_SLP_S3_L, VCCST and 38.4MHz clock are present?

Thanks!
 

waterchill

Member
Update:

I reassembled the MacBook and tried DFU mode. The machine does enter DFU successfully.

I ran the repair procedure from another Mac. The process completes all the way to the end with no error, and it reports that the Mac was repaired. However, the MacBook still does not boot afterward.

I also tried Target Disk Mode by holding T at startup, but it does not show up on the other Mac.

So currently:
  • DFU mode works
  • DFU repair/revive completes successfully
  • Mac still does not boot
  • Target Disk Mode does not work
This makes me think the T2/DFU side is alive enough to communicate, but the Intel CPU side still does not start. This seems consistent with the previous measurements: ALL_SYS_PWRGD pulses, CPU_VR_EN_R pulses, but PPVCCIN_S0_CPU, CPUCORE_PWM1/2/3, and CPUVR_PGOOD remain missing.

Would this still point more toward the CPU/U0500 side, or can U7100/ISL95828B3 still cause this even though DFU repair completes?
 

2informaticos

Administrator
Staff member
Compare diode mode to ground readings around CPU with good board; or reference table from Internet.
CPU is the first suspect here...
 

waterchill

Member
So it looks like the CPU/U0500 is dead.

For data recovery I would like to use a working donor board. The goal is only to recover the original data, not to bypass Activation Lock.

As I understand it, the donor board could even be iCloud/Activation Locked, because I would not use the donor T2 or donor NANDs. I would transfer the original T2 and the original NAND set from the faulty board, so the identity/lock state should come from the original board, not from the donor board.

What parts do I need to transfer exactly?

My current understanding:

Required:
- original T2 / U3900
- all original NANDs, not just assuming two if the board has more

Maybe required:
- U5000 / Secure Element?

Donor board:
- ideally same board number, 820-01949
- ideally same SSD capacity / same NAND configuration


Is U3900 + all original NANDs enough for data access, or should U5000 also be transferred?
Are there any other paired chips, EEPROMs or ROMs that need to move together with the T2/NAND set?

Thanks.
 
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